Added CRC16 polynomial and made extra and suppress channels optional
This commit is contained in:
43
mfm/pd.py
43
mfm/pd.py
@@ -67,6 +67,8 @@ class Decoder(srd.Decoder):
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tags = ['Disk', 'PC']
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channels = (
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{'id': 'data', 'type': 0, 'name': 'Read data', 'desc': 'channel 0', 'idn':'dec_mfm_chan_data'},
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)
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optional_channels = (
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{'id': 'extra', 'type': 107, 'name': 'Extra pulses', 'desc': 'channel 1', 'idn':'dec_mfm_chan_extra'},
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{'id': 'suppress', 'type': 107, 'name': 'Suppress pulses', 'desc': 'channel 2', 'idn':'dec_mfm_chan_suppress'},
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)
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@@ -116,6 +118,8 @@ class Decoder(srd.Decoder):
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'default': '16', 'values': ('16', '32')},
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{'id': 'data_crc_bits', 'desc': 'Data field CRC bits',
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'default': '32', 'values': ('16', '32', '56')},
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{'id': 'crc16_poly', 'desc': 'CRC16 Polynomial',
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'default': '1021'},
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{'id': 'crc32_poly', 'desc': 'CRC32 Polynomial',
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'default': '00A00805'},
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{'id': 'dsply_pfx', 'desc': 'Display all MFM prefix bytes',
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@@ -184,15 +188,7 @@ class Decoder(srd.Decoder):
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self.report_displayed = False # True = summary report already displayed, False = not displayed yet
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# 16-bit CRC-CCITT CRC accumulator and lookup table.
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self.crc_accum = 0
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self.crc_tab = array('I', [0x0000, 0x1021, 0x2042, 0x3063,
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0x4084, 0x50A5, 0x60C6, 0x70E7,
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0x8108, 0x9129, 0xA14A, 0xB16B,
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0xC18C, 0xD1AD, 0xE1CE, 0xF1EF])
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self.crc16_accum = 0
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self.crc32_accum = 0
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self.crc56_accum = 0
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@@ -264,6 +260,7 @@ class Decoder(srd.Decoder):
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self.write_data = True if self.options['write_data'] == 'yes' else False
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self.header_crc_bytes = int(self.options['header_crc_bits']) / 8
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self.data_crc_bytes = int(self.options['data_crc_bits']) / 8
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self.crc16_poly = int(self.options['crc16_poly'], 16)
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self.crc32_poly = int(self.options['crc32_poly'], 16)
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# Calculate number of samples in 30 usec.
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@@ -315,7 +312,7 @@ class Decoder(srd.Decoder):
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# ------------------------------------------------------------------------
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def iniz_crc(self):
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self.crc_accum = 0xFFFF
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self.crc16_accum = 0xFFFF
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self.crc32_accum = 0xFFFFFFFF
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self.crc56_accum = 0xFFFFFFFFFFFFFF
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@@ -326,12 +323,14 @@ class Decoder(srd.Decoder):
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# - The CRC-CCITT polynomial is x16 + x12 + x5 + 1.
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# IN: byte 00h..FFh
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# ------------------------------------------------------------------------
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def update_crc(self, byte):
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self.crc_accum = (self.crc_tab[((self.crc_accum >> 12) ^ (byte >> 4)) & 0x0F]
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^ (self.crc_accum << 4)) & 0xFFFF
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self.crc_accum = (self.crc_tab[((self.crc_accum >> 12) ^ (byte & 0x0F)) & 0x0F]
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^ (self.crc_accum << 4)) & 0xFFFF
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def update_crc16(self, byte):
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self.crc16_accum = (self.crc16_accum ^ (byte << 8)) & 0xFFFF
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for i in range(8):
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if (self.crc16_accum & 0x8000) == 0x8000:
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self.crc16_accum = ((self.crc16_accum << 1) ^ self.crc16_poly) & 0xFFFF
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else:
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self.crc16_accum = (self.crc16_accum << 1) & 0xFFFF
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# ------------------------------------------------------------------------
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# PURPOSE: Update the 32-bit CRC accumulator with one data byte.
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@@ -505,7 +504,7 @@ class Decoder(srd.Decoder):
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self.byte_end = bit_end
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def crc(self, val):
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self.update_crc(val)
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self.update_crc16(val)
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self.update_crc32(val)
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self.update_crc56(val)
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@@ -568,7 +567,7 @@ class Decoder(srd.Decoder):
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self.err_print('CRC error', self.field_start)
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self.put(self.byte_end - 1, self.byte_end, self.out_ann, [15, ['Err']])
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self.put(self.field_start, self.byte_end, self.out_ann,
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[9, ['CRC error %02X' % self.crc_accum or self.crc32_accum or self.crc56_accum, 'CRC error', 'CRC', 'C']])
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[9, ['CRC error %02X' % self.crc16_accum or self.crc32_accum or self.crc56_accum, 'CRC error', 'CRC', 'C']])
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elif typ == 'c':
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self.put(self.field_start, self.byte_end, self.out_ann,
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[10, ['CRC OK', 'CRC', 'C']])
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@@ -690,7 +689,7 @@ class Decoder(srd.Decoder):
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self.IDcrc += val
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self.byte_cnt -= 1
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if self.byte_cnt == 0:
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if self.crc_accum == 0:
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if self.crc16_accum == 0:
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self.CRC_OK += 1
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self.display_field('c')
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else:
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@@ -706,7 +705,7 @@ class Decoder(srd.Decoder):
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self.DRcrc += val
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self.byte_cnt -= 1
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if self.byte_cnt == 0:
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if self.crc_accum == 0:
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if self.crc16_accum == 0:
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self.DRcrcok = True
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self.CRC_OK += 1
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self.display_field('c')
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@@ -870,7 +869,7 @@ class Decoder(srd.Decoder):
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self.IDcrc += val
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self.byte_cnt -= 1
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if self.byte_cnt == 0:
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if self.crc_accum == 0:
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if self.crc16_accum == 0:
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self.CRC_OK += 1
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self.display_field('c')
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else:
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@@ -887,7 +886,7 @@ class Decoder(srd.Decoder):
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self.byte_cnt -= 1
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if self.byte_cnt == 0:
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if self.data_crc_bytes == 2:
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if self.crc_accum == 0:
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if self.crc16_accum == 0:
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self.DRcrcok = True
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self.CRC_OK += 1
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self.display_field('c')
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